An arrangement close to the first embodiment has already been set forth in the document EP-A-0 152 026 (U.S. Pat. No. 4,649,322). In this the triggering of the discharge in the lamp is brought about by a first generator which provides voltage pulses at predetermined periodic intervals. The luminous intensity of the lamp is controlled by a current source provided by a second generator which permits applying to the lamp a maintenance current for the discharge, the duration of application of which may be varied according to the luminous intensity which it is desired to obtain. The arrangement as mentioned includes furthermore a circuit which enables application of the maintenance current in synchronism with the voltage pulse.
In addition to the two embodiments of the pulse generator, the cited document describes a manner for reducing to practice the generator for maintaining discharge in the lamp. This maintenance generator, which is a current source, is energized from a DC voltage source and includes essentially a cascade of two transistors which conduct continuously when an instruction signal is sent to the input of the first transistor. The duraction of the application of the instruction signal (which can be for instance a video signal) determines the period during which the current source conducts, such period being for instance on the order of 14 ms for a lamp operating at full luminosity, this period being followed by a series of periods of like duration if the lamp is to remain illuminated at this full luminosity. In the case where the arrangement as described were to be adapted to vary simply the luminous intensity of a fluorescent lighting lamp, for instance by means of a manual control, a single pulse would be necessary furnished by a pulse generator at the moment of lamp turn on, this pulse being followed by a DC current to remain continuously at the chosen level.
This manner of operation is costly in electrical energy which is dissipated as heat and thus as a pure loss. Effectively, it is said in the cited document that an energization voltage of 60 V DC enables assuring an arc voltage of about 40 V in the tube, this leading one to believe that there exists a voltage drop on the order of 20 V which must be absorbed in the current generator. In reality it will be noted that the arc voltage may vary in substantial proportions (10 to 60 V), depending in this on the dynamic load to which the lamp is subjected. The temperature has also an important influence on the value of the arc voltage. Thus, in the cited arrangement, it is the current generator formed from two transistors as hereinbefore mentioned which is to absorb the difference existing between the energization voltage and the arc voltage, such difference being dissipated as a pure loss as already said.
In order to overcome the cited disadvantages, the document FR-A-1 366 032 suggests an arrangement which is a current source without itself consuming current whatever be the load, such load here being manifested by the arc voltage essentially variable as exhibited by the lamp.
This prior art will now be explained having reference to FIGS. 1a, 1b, 1c, 2 and 3.
FIG. 1a is a general schematic which shows the basic priniple on which the document FR-A-1 366 032 rests. A discharge lamp 1 which may be a fluorescent tube is provided with two electrodes 2 and 3. A first generator or starter 4 provides a voltage pulse adapted to bring about triggering of the discharge in the lamp. This first generator is however not mentioned in the cited document since the energization voltage U.sub.1 is sufficiently high (on the order of 400 volts) to enable automatic triggering of the discharge in the lamp which, as will be seen further on, is not the case in the present invention in which said voltage is only on the order of 60 volts. In this case such first generator 4 could be one of those described in the document EP-A-0 152 026. FIG. 1a shows further a second generator adapted to maintain the discharge current in the lamp, such second generator includes a first electric circuit 5 which comprises the placing into series of a DC voltage source U.sub.1, a first switch I.sub.1 and a second switch I.sub.2. Switches I.sub.1 and I.sub.2 are arranged in a manner such that when the first is open the second is closed and vice versa. This interdependence is shown on FIG. 1a by the dashed line 13 which couples the respective contact bars of said switches. The schematic further shows that at the terminals of the second switch I.sub.2 there is connected a second dielectric circuit 6 which consists of the placing into series of an inductance L and of the discharge lamp 1.
Switch I.sub.1 is operated by a control means 7. This control means is energized at its input 8 by an alternating signal of fixed period T.sub.1. This signal has its period T.sub.1 composed of an alternation of duration T.sub.2 at high level followed by an alternation of duration T.sub.3 at low level. The cyclic ratio of this signal is defined as being the ratio T.sub.2 /T.sub.1. The alternating signal of fixed period T.sub.1 is provided by an oscillator and the alternations T.sub.2 and T.sub.3 have a duration approximately equal.
FIG. 1a also shows that the control means 7 is arranged to provide at its output 15 a signal adapted to set alternately the first switch I.sub.1 initially into a closed state during a first time interval of duration T.sub.a, then into an open state during a second time interval of duration T.sub.b, the sum T.sub.a +T.sub.b being a function of the input period T.sub.1.
The operation of this arrangement will now be explained having reference to FIGS. 1b and 1c.
During the first interval of duration T.sub.a, I.sub.1 is closed and I.sub.2 is open as shown in FIG. 1b. Various source U.sub.1 provides a current flow i.sub.1 in the inductance L and the lamp 1 via switch I.sub.1 (circuit 5). In view of the presence of inductance L and the resistance R of the lamp, the current i.sub.1 will increase from a value neighboring zero to a maximum value determined at the ending of the interval of duration T.sub.a. From this moment begins the second interval of duration T.sub.b during which I.sub.1 is open and I.sub.2 is closed. The situation of the electrical circuits 5 and 6 is then that shown on FIG. 1c. The electrical energy stored in the inductance L during the preceding phase then produces a current i.sub.2 which via switch I.sub.2 circulates in the lamp 1. The inductance L then behaves as a generator. In contrast to the current practice of certain known energization arrangements, this inductance is not a current limiter but acts as a current reservoir. The current i.sub.2 will diminish during the interval of duration T.sub.b until the appearance of a new interval of duration T.sub.a which will once again close the switch I.sub.1. From the end of the period T.sub.b a new cycle recommences with a similar sequence follows.
There has just been described the general principle on which is based the energizing arrangement according to document FR-A-1 366 032. In fact it concerns a current source which itself does not consume current and which furnishes only the energy necessary to bring about the luminous flux in the lamp. Effectively, the switches as described are either on or off and consume practically no energy themselves.
The basic arrangement has been explained in referring to switches I.sub.1, I.sub.2 operated by a control means. In practice there is employed a switching transistor in place of the switch I.sub.1, such transistor being controlled on its base by the signal coming from the output 15 of the control means 7. Likewise in practice one may advantageously employ a diode to replace the switch I.sub.2, such diode being connected so that it is non-conductive when the transistor is conductive. This diode presents the advantage of being self-controlled by the polarity of the voltage present at its terminals.
The schematic of FIG. 2 shows a manner of obtaining the energizing arrangement according to the prior art. The control arrangement here is a D type flip-flop (D-FF) the terminals Set and Reset of which are connected to -12 volts of the energization for the logic. The output Q of the flip-flop is connected to its D input. On its input 8 the flip-flop receives the alternating signal of fixed period T.sub.1 likewise referred to as the clock signal (CL), this signal being provided by an oscillator 9. The transistor Ti1 is controlled on its base by the output Q of the flip-flop. The collector of the transistor Ti1 is connected to diode D1 and the emitter to the voltage source U.sub.1. The operation of the construction which has just been described will now be explained having reference to the timing diagram shown on FIG. 3.
To the input 8 of the flip-flop is applied the clock signal CL, which appears on the line a of the diagram. This signal oscillates between -12 V and 0 V (0 V symbolized by the signal .phi.) i.e. between the logic values 0 and E 1 respectively. This type of flip-flop (for instance CMOS 4013) has the particularity of placing its output Q at the value applied to its input D when the signal C1 goes from 0 to 1 (arrows 18), the passage from 1 to 0 in no manner changing the state of the output Q so long as the inputs Set and Reset are both at the 0 logic level (-12 V). Since the input D is coupled to the output Q, the output Q will change state at each rising edge 18 of the clock signal as appears on line b of FIG. 3, the rising edge 18 driving the falling and rising edges 19 of the output Q (arrows 65).
The passage from 0 to -12 V of the output Q has as effect to place the transistor Til from the blocked state (switch I.sub.1 open) to the conductive state (switch I.sub.1 closed). A current i.sub.1 begins to circulate in the circuit defined by FIG. 1b, such current having its rate of increase limited by the presence of the inductance L (see line c of the diagram of FIG. 3 which represents the current i.sub.1 in lamp 1).
When the flip-flop once again switches, its output Q goes to 0 V and renders non-conductive the transistor Ti1. From this moment the energy stored in inductance L produces a current i.sub.2 which circulates in the circuit 6 via the diode D1, this current diminishing since no voltage source continues to be applied thereto (see line c of FIG. 3). This current i.sub.2 diminished until the transistor Ti1 becomes once again conductive which take place at the arrival of a new rising edge 18 presented by the signal T.sub.1 at the input CL of the flip-flop. The cycle which has just been described in detail then continues in the same manner.
Thus the alternating signal of fixed period T.sub.1 applied to the input CL of the flip-flop and composed of two equal alternations T.sub.2 and T.sub.3 becomes seen from the lamp 1 a signal of double period and composed of two alternations T.sub.a and T.sub.b of durations approximately equal.
The diagram of FIG. 3 has been completed by a line d which represents the current I.sub.D1 in the diode D1. It will be noted that during the period of conductive T.sub.a of transistor Ti.sub.1 no current circulates in the diode while during the blocking period T.sub.b of the same transistor a current i.sub.2 circulates in said diode.
The diagram of FIG. 3 shows further a current threshold I.sub.L min below which the current in the lamp does not fall. This caused by the fact that the inductance L is not totally discharged when cycle T.sub.1 recommences.
Although not specifically mentioned in the cited prior art, lamp 1, which most often is a fluorescent lamp, has a cold anode 2 and a hot cathode 3. This cathode is a filament energized by a DC source U.sub.5. Considerations have been set forth in the document EP-A-0 152 026 on the subject of this energization and the reader may refer thereto for greater detail.